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FIGURE 8. SCHEMATIC
NOTES:
1. R 1 is used to set the output voltage of ISL820xMEVAL1Z. Initial setting is 6.49k Ω for 1.5V output voltage.
2. R 2 and R 3 , paralleling with R 1 , are used to adjust the output voltage of ISL820xMEVAL1Z.
3. R 4 is used to set the overcurrent trip level of ISL820xMEVAL1Z. The ISL8201MEVAL1Z has integrated 3.57k Ω, ISL8206MEVAL1Z has integrated 4.12k Ω , and
ISL8204MEVAL1Z has integrated 2.87k Ω
4. R 18 , C 18 and C 19 are the snubber network, which can reduce the stress for internal semiconductor.
5. R 13 , R 14 , C 12 , C 13 , C 14 and C 15 are the external compensation network. The ISL820xMEVAL1Z has integrated the type 3 compensation network inside the module
for typical applications.
6. R 15 , R 16 , R 17 , R 20 , R 21 , C 17 , Q 2 and Q 3 are the power-up sequence circuit. In case of PVCC bias, power-up first, then input voltage. This circuit has to be implemented.
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